Conventionally, a production method of a workpiece such as a silicon wafer used as a semiconductor substrate material is generally performed through a crystal growth process in which a single crystal ingot is produced by Czochralski (CZ) method, Floating Zone (FZ) method or the like, and a wafer manufacturing process in which the single crystal ingot is sliced into a wafer and at least one main surface of the wafer is mirror-polished.
Describing the wafer manufacturing process in more detail, the wafer manufacturing process comprises a slicing process for slicing a single crystal ingot to obtain a thin disk wafer, a chamfering process for chamfering a peripheral portion of the wafer obtained in the slicing process to prevent breakage or cracking of the wafer, a lapping process for flattening the wafer, an etching process for removing mechanical damage remaining on the wafer subjected to chamfering and lapping, a polishing process for mirror-polishing a surface of the wafer, and a cleaning process for cleaning the polished wafer to remove polishing agent or dust particles adhered on the wafer.
Main processes are shown in the above wafer manufacturing processes, and there may be the cases that other processes such as a heat treatment process are added therein, the same process is performed in multiple steps, and the order of processes is changed.
Among these processes, a single side polishing apparatus of the wax mount batch type in which plural wafers are adhered to a plate made of glass, ceramic or the like with wax and each one side of the wafers is polished is mainly used in the polishing process at present. In this apparatus, the plate in which wafers are held is placed on a turntable in which a polishing pad is attached, a load is applied to an upper top ring, and the polishing is performed as the turntable and the top ring are rotated. There are several forms of polishing apparatuses in addition to this. There are several types of the polishing, for example, a double-side polishing type that both sides of wafers are mirror-polished simultaneously by holding wafers between upper and lower turn tables, a single wafer processing type that wafers are polished one by one while holding it on a plate by vacuum suction, and a wax-free polishing type that wafers are polished while holding them with a backing pad and a template without using an adhesive such as wax.
In particular, recently, in accordance with the increase in diameter of a wafer (workpiece), a single wafer processing type apparatus that wafers are polished one by one while holding it on a wafer holder (plate) by vacuum suction has been used.
In the case that the polishing was performed with the above-described single wafer processing type apparatus by holding a wafer by vacuum suction, there are some cases that extremely small unevenness is observed on a wafer surface. In particular, it is numerously observed around parts of a wafer surface corresponding to where suction holes exist. This unevenness can be observed on a level in the case of the observation by a magic mirror image or evaluation of unevenness in a micro area referred as nanotopography.
In particular, it is often observed when polishing is performed with a workpiece holder of which the holding surface is coated with epoxy resin or the like, or performed by adhering a workpiece on a plate with wax or the like.
Also, in the case that a workpiece is held with a backing pad and a template, there may be the case that under the influence of the uneven thickness of the backing pad and the uneven thickness of adhesive generated when a backing pad itself is adhered to a workpiece holder, those are transferred to a surface of the wafer after polishing.
The nanotopography (may be called as nanotopology) is unevenness of which wavelength is about 0.1-20 mm and amplitude is about from several nanometers to one hundred nanometers, and as an evaluation method thereof, vertical interval of the unevenness on a wafer surface (P-V value; peak to valley) is evaluated in a region called a block area of a square about from 0.1 to 10 mm on a side or a circle having a diameter of about from 0.1 to 10 mm (this area is called WINDOW SIZE, or the like).
This P-V value is also called Nanotopography Height, or the like.
As to the nanotopography, in particular, it is desirable that the maximum value of unevenness on a surface of a wafer evaluated is small.
When processes that metal patterns are formed on a wafer, an insulator film is formed thereon, the insulator film is polished, and so on are repeated in the device fabricating process, the existence of the unevenness on the above level has come to a problem. In particular, in a high-integrated device process, the unevenness causes defocus failure in lithography exposure, and thus it makes the decrease of yield of high-integrated devices, which came to a problem.